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System Level Design from HW/SW to Memory for Embedded Systems: 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Igua�u, Brazil, November 3-6, 2015, Proceedings
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Barnes and Noble
System Level Design from HW/SW to Memory for Embedded Systems: 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Igua�u, Brazil, November 3-6, 2015, Proceedings
Current price: $54.99
Barnes and Noble
System Level Design from HW/SW to Memory for Embedded Systems: 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Igua�u, Brazil, November 3-6, 2015, Proceedings
Current price: $54.99
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The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.